1. Field of the Invention
The present invention generally relates to cache memories, and particularly relates to managing partitioning of such memories, such as between higher and lower priority entries.
2. Relevant Background
Partitioning cache memories into locked and unlocked regions represents a common practice. More particularly, it is known to apportion the ways of a cache set between locked and unlocked entries, but conventional approaches to locked/unlocked partition management have certain drawbacks.
For example, one method of dividing cache ways into locked and unlocked portions uses a total of three pointers per cache set. The three pointers include a locked pointer to indicate the next locked entry in the cache set, and an unlocked pointer used to indicate the next unlocked entry in the cache set. The third pointer defines an upper limit or ceiling for the locked entry partition, and thus establishes a fixed floor for the unlocked partition. That is, with the three-pointer approach, two pointers are used to manage successive writes for the locked and unlocked portions of the cache set, and a third pointer is used to indicate the fixed boundary between the locked and unlocked portions of the cache set.
Another approach to managing locked and unlocked portions of a given cache set relies on the use of locked/unlocked bits per cache line in each cache way of the set. With this approach, additional register bits mark individual cache lines as locked or unlocked.
While the above methods do permit at least limited management of locked and unlocked portions of cache sets, they do so at the expense of additional register usage, increased software overhead, and lowered cache usage efficiencies. These disadvantages become particularly problematic for large caches where significant register resources are given over to the management of cache memory partitions.